Low Power Physical Design Engineers

4 Years


Job Description

Expertise in Low Power Physical Design and Static Timing Analysis
experience in Netlist-gds Flow Which Includes Synthesis, Layout(floorplan, Place and Route, Cts (clock Tree Synthesis), Static Timing Analysis, Formal Verification, Physical Verification(drc- Design Rule Check, Lvs- Layout Vs Schematics) and Power Analysis(ir Drop, Emig)
exposure to Low Power Design Flow is Preferred.

Salary 5 Lac To 10 Lac P.A.
Industry IT Hardware / Technical Support / Telecom Engineering
Work Experience 4 Years
Qualification Other Bachelor Degree

Key Skills

Design Engineer Design Engineering Autocad

Company Profile

Company Name

I India pvt ltd

About Company Location:Bangalore
Email ID gtalentpool@gmail.com

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