Job openings for design verification engineer in bangalore

ASIC Design Verification Engineer


knowledge with prior work experience on live projects. Expertise in creating detailed test plan with well-defined functional coverage.

• Should be able to architect and implement self generating / self checking simulation verification environment to reach functional coverage goals using random/directed stimulus.
• Knowledge of scripting language like Perl, Shell, TCL or Python.
• Very Good debugging skills.
• Should have good documentation/communication skills and be able to work with multi-functional, multi-site teams.
• Experience in running and debugging Gate level simulations.
• Successful experience in 802.11 Wireless VLSI designs or other related technologies is a big plus.

Experience 3 - 5 Years
Salary 6 Lac To 15 Lac P.A.
Industry IT Software - Others
Qualification B.Tech/B.E
Key Skills UVM SV

About Company

Contact Person Mamta
Address Bangalore
Mobile 9110123704
Email ID